Z80 Home

Z80 system, with EPROM, RAM, 8255 PIO

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Some EPROMs require 0 or +5 at the VPP pin to enable read, on most 27C256 tire VPP to +5
The EXO-3 is some sort of an Xtal? Oscillator with selectable divider
The PST520A is a low-voltage controlled reset

Memory map:
EPROM = 0000h - 7fffh
RAM   = 8000h - ffffh 

IO map:
Base adr. PIO 1 = 40h
Base adr. PIO 2 = 80h

Comment by Giampaolo Minetti:

The two periferals mapped in the I/O space at $40 (PIO1) and $80 (PIO2) are supposed to be selected when their \CS pin is brought low. However, their \CS pin is connected to A6 (PIO1) and A7 (PIO2) which go HIGH when the values $40 and $80 are put on the address bus! Therefore, an inverter is needed between A6 and \CS of PIO1 and between A7 and \CS of PIO2.